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  • Job reference: RMS0226478

System Validation Engineer

  • Sector: ICT
  • Location: California
  • Job type: Permanent
  • Date posted: 10/08/2020
  • Duration: direct hire
This vacancy has now been filled.

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The Role:
Writing C++ System Level tests targeting the CPU/DSP/CNN cores in C++
Writing CPP Performance and Power system-level use-cases
Work on FPGA and Emulation scripts and flows for system validation, to increase productivity across the team Work on post-silicon bringup and flows Work closely with Algorithm engineers, DV engineers, Architects and Designers to come up with system level use-case scenarios Work closely with Design Verification to enhance and augment verification for IPs on FPGA and/or Emulation platforms
Work closely with Firmware, Reference Modeling, and Software engineers to assist software development and debug


Experience in CPP for writing system level test-cases for SoC like IP Experience in scripting languages such as Python, TCL etc Experience running tests on FPGA and/or Emulation platforms for SoC like IP Experience in post-silicon bringup and flows for SoC like IP Experience with lab system debug with logic analyzers, scopes, meters, etc Experience in performance evaluation and modeling for SoC like IP Experience in power tests and evaluation on prototyping platforms Familiarity with AMBA protocol, OCP protocol Familiarity in System Verilog for design and verification - for debugging

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Fircroft has been placing people in specialist technical industries for over 50 years, focusing on mid to senior level engineers for contract and permanent roles worldwide. By applying for this job you give consent for Fircroft to contact you, via email & telephone, to discuss your application along with future positions and Fircroft's services.

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